This role supports Physical Design responsibilities for 32-bit microcontrollers and wireless solutions

• Execute standard Physical Design implementation practices.
• Conduct die size estimations and manage bond-out approvals.
• Achieve timing closure to optimize process node performance & Expertise in timing closure and debugging.
• Setup, debug, and synthesize clock trees for high-quality QoR.
• Design and support multi-voltage island-based floorplans.
• Develop and automate design flows.
• Deliver Physical Verification (PV)-compliant designs.
• Collaborate with external vendors and IP providers to resolve issues.
• Work closely with international design and implementation teams.

--  10+ years of experience in Physical design and timing aspects of IC design, with leadership capability

• Expertise in VLSI logic design, clock tree synthesis/debugging, and timing closure.
• Proficiency in place-and-route and low-power design methodologies.
• Experience in system-level floorplanning, power network planning, and power integrity/reliability (EM/IR) analysis.